Our client a leading Multinational Semiconductor Company requires Senior Digital Methodology Engineer for role based in Dublin, Ireland.
You will develop common Digital Implementation methodologies, and support their adoption across the company. Additionally, there will be some responsibility for Digital library view generation & checking
- This will involve:
- Selecting the most appropriate methods & techniques for delivering optimal results and productivity.
- Closely supporting, and developing relationships with, multiple design groups.
- Developing and delivery of high-quality documentation and training.
- Instigating discussions to identify strengths and weakness of implemented solutions, document results and provide improvements.
- You will be expected to develop expert skills in, and eventually take responsibility for the support of:
- Logic Synthesis including Scan Insertion and Functional ECO implementation.
- Static Verification including Formal Equivalency Checking (FEC), Static Timing Analysis (STA), Power analysis, Clock & Register Domain Crossing (CDC/RDC) checks.
- RTL Linting.
Requirements and Education:
- Typically, 3-5 years’ industry experience.
- Degree level qualification in Electronics / Microelectronics Engineering or a related discipline.
- Understanding of Digital ASIC Design, Implementation & Verification flows.
- Ability to prioritize activities, set goals and meet deadlines under tight schedule pressure.
- Experience in digital design techniques and coding languages (Verilog and System Verilog).
- Experience with Unix/Linux Environments.
- Ability to solve complex issues in creative and effective ways.
- Concise and proactive communication skills within a multi-site and multi-cultural environment.
- Ability to work both independently and part of a team.
- Good written and verbal communication skills in English.
- Good interpersonal skills / ability to persuade and influence based on technical facts.
- Willingness & ability to undertake occasional international travel.
- Knowledge of the Liberty Digital Library format.
- Experience with Python/Perl/TCL.
- Understanding of Logic Synthesis, Design for Test, Static Timing Analysis and Formal Equivalence Checking.
For further information please contact Mícheál at Software Placements on 00353 1 5254642 or email email@example.com