Client:
Our client a leading a Multinational Semiconductor Organisation requires Lead, Staff and Senior Analog Mixed Signal Design Engineer with background in PMIC for roles in Milan, Italy.
Role:
The group is seeking an experienced Lead, Staff and Senior Analog Design Engineers for there office in Milan to work on PMIC and hybrid mixed signal / power developments, for High-End / High-Volume electronic devices, such as Smartphones, Tablets and Consumer Accessories.
The Battery Consumer Power Milan Team is expanding its focus in Power Solutions, across a broad range of IC engineering profiles and levels of experience.
The candidates will be self-motivated, willing to learn exciting new technologies and develop new products, but also be able to work effectively within a talented group of individuals across multiple development locations.
The candidate will be involved in the following developments, from definition to production:
- LDO, BUCK, BOOST, BUCK-BOOST, CHARGE-PUMP, IBB (Inverted BUCK-BOOST)
- Oscillators, PLL, Bandgap, References, ADC, DAC, I/O, OTP, MTP, DFT
Responsibilities:
- Power IP Development
- Power Management IC Development
- Execute on PMIC design, pre-silicon verification and post-silicon validation
- Provide guidance to physical design layout team
- Technical Customer Interface Engagement
- Participate in customer engagements, in support of technical feasibility
- IC Milestone Workshops
- Human Resources
- Enable a culture of continuous learning and improvement
- Support task planning
Education:
- Master’s degree or higher in Electrical Engineering, Computer Science, or Computer Engineering
Experience:
At least 5 years of experience in:
- IP Analog Design experience
- Some technical and analytical background, with good problem-solving skills
- Good team worker with multi-discipline
- Some understanding of Mixed-Signal Design Flow and Top-Down development methodology
- Some understanding of Power IP Topologies
- Analog Functional and Parametric Verification
- Process - Voltage - Temperature (PVT) Corners, Layout Parameter Extraction (LPE) Simulations
- Good written and verbal communication
Nice to have:
- Proficient with Cadence Suite (Virtuoso ADE Spectre)
- Scripting languages
- HDL programming languages (Verilog / SystemVerilog)
- Analog Behavioral Models (Verilog-A, Verilog-AMS)
- Mixed-Signal Verification
- Lab silicon bring-up experience
Contact:
For further information please contact Mícheál at Software Placements on 00353 1 5254642 or email micheal@softwareplacements.ie